发明名称 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To enable the surface of a semiconductor chip to be totally and fully flattened, to form a second wiring into a fine pattern, and to prevent an electric short circuit from occurring between the second wiring and a plate electrode. SOLUTION: A dummy pattern process, a film forming process, and a flattening process are successively carried out to make an interlayer film equal in height even in a peripheral circuit region 12 as well as a memory cell region. A dummy storage electrode 9 and a dummy plate electrode 10 as high as capacitor electrodes in the memory cell region are arranged in a peripheral circuit region 12, which does not require capacitor electrodes (a storage electrode 7 and a plate electrode 8) in the dummy pattern process, a second interlayer film (11) is deposited covering the capacitor electrodes and the dummy capacitor electrodes and spreading over the memory cell region and the peripheral circuit region 12 in the film forming process, and the surface of a semiconductor chip is flattened by polishing the second interlayer film (11) through a CMP process. When the peripheral circuit region 12 and the memory cell region get flush with each other, a polishing pressure becomes nearly equal anywhere at CMP. Therefore, the second interlayer film becomes constant in thickness after a CMP process, and a residual film gets uniform in thickness.
申请公布号 JP2000124421(A) 申请公布日期 2000.04.28
申请号 JP19980298336 申请日期 1998.10.20
申请人 NEC CORP 发明人 SATO NATSUKI
分类号 H01L27/108;H01L21/8242 主分类号 H01L27/108
代理机构 代理人
主权项
地址