| 摘要 |
A first insulating layer (13-1) of a first thickness (D1) is deposited on a semiconductor substrate. The capacitative structure is formed and its first electrode (14) contacts a first region of the substrate. A second insulating layer (13-2) of a second thickness (E1) is deposited, and contacts with the second region (2-2) of the substrate and with a second electrode (16) are formed. Formation of the contacts involves: (i) forming, in the first and second insulating layers, a via (O20) in order to partially expose the second region (2-2); (ii) filling the via and depositing and etching a first metallic material (17); (iii) depositing and planarizing a third insulating layer (18), (iv) forming simultaneously a third via (O30) in the second and third insulating layers and a fourth via (O40) in the third insulating layer in order to expose, respectively, a second electrode region and a first metallic material region; and (iv) filling the third and fourth vias and depositing a second metallic material (19). Preferably, the first and second thicknesses (D1) and (E1) are 100-900 nm, the sum of (D1) and (E1) being 1, the first and second electrodes are made of polycrystalline silicon, the first metallic material is tungsten, the second metallic material is aluminum, and the first second and third insulating layers are made of silicon oxide. |
