发明名称 Electronic circuit device having a recirculating memory buffer (FIFO)
摘要 The circuit has a circulating memory circuit or FIFO memory circuit (1) with a data input (7) and a data output (8), whereby in a storage operating mode the data applied to the data input are temporarily stored. A bridge circuit arranged between the data input and the data output controls direct, delay-free transfer of the data to the data output using a selection signal in a direct operating mode. The bridge circuit is in the form of a switch (11) between the data input and output and parallel to the FIFO circuit.
申请公布号 EP0996229(A2) 申请公布日期 2000.04.26
申请号 EP19990119290 申请日期 1999.09.28
申请人 INFINEON TECHNOLOGIES AG 发明人 JOHNSON, BRET
分类号 G11C7/00;G06F5/06;G11C7/10;G11C19/28;H03K3/02;H03K19/00;H03K19/017;H03K19/0175;(IPC1-7):H03K19/00 主分类号 G11C7/00
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