发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To simplify a manufacturing process with no degradation in characteristics such as a breakdown voltage and resistance to avalanche- breakdown, related to a vertical power MOS-FET. SOLUTION: Related to the semiconductor device (FET or IGBT), a well region 20 is so formed as to enclose an active region A provided with a large number of base regions 2. The well region 20 is provided with a large number of well extension parts 21 which extend in comb-shape toward the active region A. A gate electrode 5 is provided with a large number of gate extension parts 5a which extend in comb-shape from the active region A toward the surrounding well region 20, so that the gate extension parts 5a extend between the well extension parts 21, and the well extension part 21 and the gate extension part 5a are formed, in comb-shape, as to complement each other. The interval between the well extension parts 21 is set almost equal to that between the base regions 2. A gate drawn metal electrode 23 is connected to the tip end part of the gate extension part 5a.
申请公布号 JP2000114524(A) 申请公布日期 2000.04.21
申请号 JP19980288263 申请日期 1998.10.09
申请人 NIPPON INTER ELECTRONICS CORP 发明人 MARUOKA SUSUMU;MIYAGAWA SEIICHI
分类号 H01L29/78;H01L21/336;H01L27/04;H01L29/739;(IPC1-7):H01L29/78 主分类号 H01L29/78
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