发明名称 MOSFET device to reduce gate-width without increasing JFET resistance
摘要 The present invention discloses a method for fabricating a MOSFET device supported on a substrate. The method includes the steps of (a) growing an oxide layer on the substrate followed by depositing a polysilicon layer and applying a gate mask for performing an undercutting dry etch for patterning a plurality of polysilicon gates with a gate width narrower than a width of the gate mask; (b) applying the gate mask as body implant blocking mask for implanting a body dopant followed by removing the gate mask and carrying out a body diffusion for forming body regions; (c) applying a source blocking mask for implanting a source dopant to form a plurality of source regions; (d) forming an overlying insulation layer covering the MOSFET device followed by applying a dry oxide etch with a contact mask as a second mask to open a plurality of contact openings there through then removing the contact mask; (e) performing a high temperature reflow process for the overlying insulation layer and for driving the source regions into designed junction depths; (f) depositing a metal layer followed by applying a metal mask for patterning the metal layer to define a plurality of metal segments.
申请公布号 US6049104(A) 申请公布日期 2000.04.11
申请号 US19970980460 申请日期 1997.11.28
申请人 MAGEPOWER SEMICONDUCTOR CORP. 发明人 HSHIEH, FWU-IUAN;WENG, SHANG-LIN;KOH, DAVID HAKSUNG;LY, CHANH
分类号 H01L21/336;H01L29/10;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L21/336
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