发明名称 DELAY PHASE LOCKED LOOP CIRCUIT FOR SPREAD SPECTRUM COMMUNICATION DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To establish synchronization by always optimizing a cut-off frequency of filters in response to a spread bandwidth that is optionally set. SOLUTION: A frequency-voltage converter 11 detects a frequency of a reference clock signal outputted from a voltage controlled oscillator 9 as a frequency of a reference pseudo noise code and adjusts a cut-off frequency of low pass filters 4, 5. Thus, synchronization is established by always optimizing the cut-off frequency of the filters 4, 5 in response to the spread bandwidth.</p>
申请公布号 JP2000091911(A) 申请公布日期 2000.03.31
申请号 JP19980261725 申请日期 1998.09.16
申请人 TOSHIBA CORP 发明人 HORIGUCHI YOSHINORI
分类号 H03L7/08;H04B1/7085;H04J13/00;(IPC1-7):H03L7/08 主分类号 H03L7/08
代理机构 代理人
主权项
地址