发明名称 REDUNDANT FORM ADDRESS DECODER FOR MEMORY SYSTEM
摘要 <p>The present invention provides a memory system (200) that retrieves data based upon redundant form address data. The memory system (200) includes a memory (220) having a plurality of memory lines (222) and an address decoder (210) that enables one of the memory lines (222) in response to a redundant form address signal. A redundant form decoder (230) decodes redundant form data into a differential pair of decoded address lines for each bit position of a memory address. One of the two differential pairs carries correct address data. The one address line to be used is determined on a memory line by memory line basis, using the address of the memory lines themselves. The redundant form address decoder (230) avoids a completion add that would otherwise be required, yielding very fast access to memory.</p>
申请公布号 WO2000017757(A2) 申请公布日期 2000.03.30
申请号 US1999027873 申请日期 1999.08.27
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