发明名称 ERROR ANALYZER
摘要 PROBLEM TO BE SOLVED: To enable to specify a substrate, etc., which is a source of generation of a failure when a parity error is found by checking whether the same data are transmitted and received by respective substrates or not when the data are transmitted and received between a main control substrate and a peripheral substrate. SOLUTION: When data are to be written in the peripheral substrate by the main control substrate, the data are transmitted to the peripheral substrate in a form of data with parity bit. In the case of transmission, each piece of input and output data about bus drivers 5, 13 is compared by comparators 17, 23 at data comparison circuits 22, 28 on the both substrates and a comparison result is held in latch circuits 18, 24. In this case, when the bus driver 5 or 13 is out of order, an LED 19 or 25 turns on, the parity error is detected by a parity operation circuit 15 and a parity check circuit 16 on the peripheral substrate, and outputted to an interruption controller 11 and the parity error is detected by a CPU as well. However, since the LED 19 or 25 turns on, the parity error is analyzed as failure of the bus driver 5 or 13.
申请公布号 JP2000081987(A) 申请公布日期 2000.03.21
申请号 JP19980250661 申请日期 1998.09.04
申请人 HITACHI KOKI CO LTD 发明人 IBUSUKI AKIRA
分类号 G06F11/10;G06F11/00;G06F11/30;G06F11/32;G06F13/00 主分类号 G06F11/10
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