PLL CIRCUIT, AD CONVERSION CIRCUIT USING THE SAME AND VIDEO SIGNAL PROCESSOR

摘要

PROBLEM TO BE SOLVED: To obtain a highly accurate PLL capable of variably adjusting the phase relation between a dot clock signal and an analog video signal without providing an expensive IC by outputting the dot clock signal by varying frequency according to a DC value of a loop filter output to output a voltage difference signal by filtering it and converting it into a DC signal. SOLUTION: Frequency information of vertical and horizontal synchronizing signals of various video standards are stored in a microcomputer 120, the standard is judged and held by collating the frequency information of the video standard and the frequency information of the vertical and horizontal synchronizing signal to be inputted. And information on frequency division from the microcomputer 120 is stored in a frequency divider pulse generation circuit 110. On the other hand, the dot clock signal generated by a voltage control oscillator 119 is supplied to a clock input terminal of a counter like a counter of the frequency divider pulse generating circuit 110, the frequency is divided 1/n by the counter and an H pulse signal formed by dividing the frequency by 1/n is outputted from the frequency divider pulse generating circuit 110.