发明名称 Convolutional interleaver and method for generating memory address therefor
摘要 A convolutional interleaver for interleaving a data stream composed of N number of data with predetermined interleaving level B to randomize the data stream for an error correction, comprising: an input buffer; a memory; an address generating unit; an output buffer; and a controller, and a method for generating an address of the memory are disclosed. In the method for generating an address of the memory, a basic memory of which the number of vertical end is B-1 and horizontal length is (B-1)xM cell is transformed to an intermediate memory of which the number of vertical end is B-1 and horizontal length is (B/2)xM cell, and a physical address for accessing the intermediate memory is generated. The physical address is maintained during one clock period, while the memory reads the previous data stored in the memory position corresponding to the physical address during the first half period of the clock and stores the current input data in the same memory position corresponding to the physical address during the latter half period of the clock.
申请公布号 US6035427(A) 申请公布日期 2000.03.07
申请号 US19970886514 申请日期 1997.07.01
申请人 DAEWOO ELECTRONICS CO., LTD. 发明人 KWEON, OH SANG
分类号 G11C11/41;H03M13/00;H03M13/27;(IPC1-7):G06F12/00;G06F5/00;G06F9/00;G06F11/00 主分类号 G11C11/41
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