发明名称 |
Determining hardware complexity of software operations |
摘要 |
A new class of general purpose computers called Programmable Reduced Instruction Set Computers (PRISC) use RISC techniques a basis for operation. In addition to the conventional RISC instructions, PRISC computers provide hardware programmable resources which can be configured optimally for a given user application. A given user application is compiled using a PRISC compiler which recognizes and evaluates complex instructions into a Boolean expression which is assigned an identifier and stored in conventional memory. The recognition of instructions which may be programmed in hardware is achieved through a combination of bit width analysis and instruction optimization. During execution of the user application on the PRISC computer, the stored expressions are loaded as needed into a programmable functional unit. Once loaded, the expressions are executed during a single instruction cycle.
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申请公布号 |
US6035123(A) |
申请公布日期 |
2000.03.07 |
申请号 |
US19950554310 |
申请日期 |
1995.11.08 |
申请人 |
DIGITAL EQUIPMENT CORPORATION;HARVARD COLLEGE |
发明人 |
RAZDAN, RAHUL;SMITH, MICHAEL D. |
分类号 |
G06F9/318;G06F9/38;G06F9/45;(IPC1-7):G06F9/44 |
主分类号 |
G06F9/318 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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