发明名称 SIGMA DELTA MODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To insert a delay device that can delay by one block such as a D/A converter DAC to a main negative feedback loop FB0 in aΔΣmodulation circuit provided with switched capacitor integration devices. SOLUTION: An output of a D/A converter circuit DAC is fed back negatively to an input of a 1st stage integration device IN1 and to an input side of a 2nd stage integration device IN2 and summed negatively at a main adder K1. Thus, even when a feedback signal that is substantially to be fed back negatively from the D/A converter circuit DAC to an input side of the integration device IN1 is delayed by one block, the signal is given equivalently to the post-stage and insertion of a delay device to the negative feedback loop FB0 is attained without revision of the algorithm and then this circuit is put into practice.
申请公布号 JP2000068840(A) 申请公布日期 2000.03.03
申请号 JP19980239208 申请日期 1998.08.25
申请人 SHARP CORP 发明人 SUGIYAMA MICHINORI
分类号 G06G7/186;H03H19/00;H03M3/02;(IPC1-7):H03M3/02 主分类号 G06G7/186
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