| 摘要 |
PROBLEM TO BE SOLVED: To form a capacitor having a metal electrode plate in a semiconductor element, without using a specified process flow by forming an upper electrode of a capacitor element and a first level of a metal interconnection at the same time. SOLUTION: An interlayer dielectric 18 is formed on a semiconductor substrate 10, a lower electrode and dielectric layer are deposited to cover it and selectively etched to partially remove and expose a part of the interlayer dielectric 18, an upper electrode layer is deposited on the dielectric layer and the interlayer dielectric 18, the upper electrode layer, dielectric layer and lower electrode layer are etched to form an upper electrode plate 42, dielectric plate 40 and lower electrode plate 38, thus forming a capacitor structure, and a metal interconnection 36 is formed, while leaving at least a part of the upper electrode layer on the interlayer dielectric 18 during the etching of the upper electrode layer.
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