发明名称 |
Layout design of integrated circuit, especially datapath circuitry, using function cells formed with fixed basic cell and configurable interconnect networks |
摘要 |
A group of function cells (e.g., 40), each created from one or more implementations of a fixed basic cell (20), are utilized in designing a layout for at least part of an integrated circuit. Each basic cell implementation contains a plurality of unconnected transistors (Q1-Q10) arranged in a transistor pattern identical to, or a mirror image of, the transistor pattern in each other basic cell implementation. Transistors of a specified polarity type in each basic cell implementation are normally of two or more different current-carrying capabilities. Each function cell has an interconnection network (42-44) for electrically interconnecting transistors in that function cell to perform a specified electronic function. The function cells typically form a cell library from which certain function cells are selected for generating the layout. The present layout technique is particularly applicable to laying out datapath circuitry (90) in an integrated circuit.
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申请公布号 |
US6031982(A) |
申请公布日期 |
2000.02.29 |
申请号 |
US19960749861 |
申请日期 |
1996.11.15 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
TRUONG, HO D.;PARK, DONGWON;YANG, HYUNGSUK;JUNG, SEOKKYUN |
分类号 |
H01L27/118;(IPC1-7):G06F17/50;H01L27/10 |
主分类号 |
H01L27/118 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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