| 摘要 |
An integrated circuit device with a vertical via/contact is described. An insulating layer covers semiconductor device structures in and on a semiconductor substrate. A conducting layer overlies the insulating layer. An intermetal dielectric layer overlies the conducting layer. An aluminum layer overlies the intermetal dielectric layer and fills a via hole extending through the intermetal dielectric layer and through the conducting layer wherein the said via hole includes an undercutting of the intermetal dielectric layer and wherein the portion of the via hole undercutting the interlevel dielectric layer has vertical sidewalls. The via hole may extend either partially through the conducting layer or all the way through the conducting layer to the underlying insulating layer. This completes the integrated circuit device.
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