发明名称 DATA PROCESSOR AND COMPUTER SYSTEM HAVING DATA UNIT
摘要 PROBLEM TO BE SOLVED: To obtain an input/output controller with a reliability, which can cope with a memory fault by providing a second controller having a memory controller for enabling the access of the second controller to first and second memory devices to be executed. SOLUTION: The system is provided with the memory controller 224B for enabling the access of the second controller to the first and the second memory devices to be executed. The memory controller 224B is provided with a first logical unit for obtaining the access to the first memory device 234A and the second logical unit for enabling transferring data to the first and second memory devices 234A and 234B. Also, the memory controller 224B is provided with the third logical unit for receiving the display of the memory fault as against the first memory device 234A and disabling the memory controller 224B from performing access to the first memory device 234A.
申请公布号 JP2000047949(A) 申请公布日期 2000.02.18
申请号 JP19990140579 申请日期 1999.05.20
申请人 HEWLETT PACKARD CO <HP> 发明人 CHUN JON
分类号 G06F12/16;G06F3/06;G06F11/00;G06F11/16;G06F11/20;G06F13/00;(IPC1-7):G06F12/16 主分类号 G06F12/16
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