Process of plating selective areas on a printed circuit board

摘要

A process for plating gold on a multi-layered printed circuit board, having plated copper on an external surface. In one embodiment, first copper features for plating gold thereon and second copper features for plating copper thereon are selected on the external surface. The first copper features are internally connected to the second copper features. An etch-resist on the first and second copper features is deposited. The second copper features are masked, while a region containing the first copper features is exposed. Copper from the region is etched. The etch-resist on the first copper features is removed. Gold is then plated on the first copper features.