发明名称 |
METHOD FOR FORMING SILICIDE CONDUCTIVE LINE OF SEMICONDUCTOR DEVICES |
摘要 |
PURPOSE: A forming method of silicide conductive lines is provided to prevent an impurity diffusion and reduce a resistivity of the conductive line by making amorphous the silicide layer. CONSTITUTION: The method comprises the steps of: sequentially depositing a gate polysilicon layer(12) doped phosphorous and a tungsten silicide layer(13) on a silicon substrate(10); making amorphous the silicide layer(13) by ion-implanting to the silicide layer; patterning the tungsten silicide layer(13) and the gate polysilicon layer(12) using en etching mask for forming a gate electrode; and recrystallizing the amorphous silicide layer by performing an annealing process.
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申请公布号 |
KR20000003954(A) |
申请公布日期 |
2000.01.25 |
申请号 |
KR19980025262 |
申请日期 |
1998.06.30 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD. |
发明人 |
KIM, HYUN SOO;LEE, SANG MOO |
分类号 |
H01L21/265;(IPC1-7):H01L21/265 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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