| 摘要 |
PURPOSE: A slew rate output circuit is provided to shorten a delay time of an output waveform by controlling a constant current which charges and discharges an input capacitance of an output transistor while maintaining the function of the slew rate. CONSTITUTION: For a short fixed time interval after a transition of an input pulse signal(Vin) from low level to high, a delay circuit(D1) and a NAND gate(G1) generate a signal(Va) of low level so that an output transistor(Q0) is driven by; the input pulse signal having an interposition of a resistor(R0) and a drain of a P-channel transistor(Q1) having an interposition of a resistor(R1). Secondly, for a short fixed time interval after a transition of the input signal from high level to low, a delay circuit(D2) and a NOR gate(G2) generate a signal(Vb) of high level so that the output transistor(Q0) is driven by; the input pulse signal having an interposition of the resistor(R0) and a drain of a N-channel transistor(Q2) having an interposition of a resistor(R2). Finally, for a time interval excluded from the two time intervals mentioned above, the output transistor is driven by the input pulse signal only having an interposition of a resistor(R0). |
