| 摘要 |
PROBLEM TO BE SOLVED: To provide a microprocessor and a data processing system in a configuration capable of tracing without spoiling the real-time nature while having a cache memory function. SOLUTION: Concerning a microprocessor 21 of a style for exchanging data with a RAM through a system bus 16 while having a cache memory 23, this device is arranged with a data trace bus control part 52 for supplying plural pieces of data to be traced to be arranged until the final stage of pipeline in order to output the data to be traced without affecting the bus cycle of the system bus and output terminals 63-66 for outputting the data to be traced from the data trace bus control part 2 to the outside.
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