发明名称 Method of oxide etching with high selectivity to silicon nitride by using polysilicon layer
摘要 A new method for planarization of shallow trench isolation is disclosed by using a polysilicon layer to prevent trench formed in a silicon nitride layer. The formation of the shallow trench isolation described herein includes a pad layer and a silicon nitride layer formed on a semiconductor wafer. A polysilicon layer is subsequently formed on the silicon nitride layer. A shallow trench is then created by photolithography and dry etching processes. The photoresist is subsequently removed in which an oxide layer is form in the shallow trench and on polysilicon layer for the purpose of isolation. A selective etching is used to etch the oxide layer. A CMP is performed to produce a planarized surface on a silicon wafer.
申请公布号 US6015757(A) 申请公布日期 2000.01.18
申请号 US19970887034 申请日期 1997.07.02
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD. 发明人 TSAI, CHIA-SHIUNG;LEE, KUEI-YING;TAO, HUN-JAN
分类号 H01L21/3105;H01L21/762;(IPC1-7):H01L21/302 主分类号 H01L21/3105
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