发明名称 Interpolating circuit
摘要 There is a parallel-connected circuit of a first PMOS transistor P1 having its gate connected to a first input terminal IN1 and a second PMOS transistor P2 having its gate connected to a second input terminal IN2, and a first series-connected circuit of a first NMOS transistor N1 having its gate connected to the first input terminal IN1 and a second NMOS transistor N2 having its gate connected to the second input terminal IN2, and there is a second series-connected circuit of a third PMOS transistor P3 having its gate connected to the first input terminal IN1 and a fourth PMOS transistor P4 having its gate connected to the second input terminal IN2, which is provided between the first power supply and output terminal, this being connected in parallel with the parallel-connected circuit of the first PMOS transistor P1 and the second PMOS transistor P2.
申请公布号 US6016064(A) 申请公布日期 2000.01.18
申请号 US19980038971 申请日期 1998.03.12
申请人 NEC CORPORATION 发明人 SAEKI, TAKANORI
分类号 G06F1/10;H03K5/13;H04J3/02;H04L7/02;(IPC1-7):H03K19/094;H03K19/017;H03K19/01 主分类号 G06F1/10
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