ATD PULSE GENERATING DEVICE

摘要

PURPOSE: An ATD pulse generating device is provided to minimize a layout area CONSTITUTION: The ATD pulse generating device including an input circuit portion(1), an address generating portion(2,30) and ATD pulse generating portion(40) wherein the ATD pulse generation portion comprises: a first NMOS transistor(NM30) having a gate to receive the output of the input circuit portion and a source to receive Vcc; a second NMOS transistor(NM40) having a gate to receive the output of the address generation portion, a source to receive Vss and a drain connected to the drain of the first NMOS transistor; a third NMOS transistor(NM50) having a gate to receive the output of the input circuit portion and a source to receive Vss; a fifth NMOS transistor(NM70) having a source connected to the drain of the third NMOS transistor, a gate connected to the source of the first NMOS transistor and a drain to receive Vcc; a fourth NMOS transistor(NM60) having a gate to receive the output of the address generating portion, a drain connected to the source of the fifth NMOS transistor and a source to receive Vss; and an inverter(I4) connected to the drain of the fifth NMOS transistor.