发明名称 POWER SOURCE WIRING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To improve the wiring rate of general signal wiring by moving power source wiring within a prescribed range, narrowing its width and dividing and wiring it when a wiring usage quantity within the prescribed area is larger than wiring capacity based on the information of virtual general signal wiring and the previously registered power source wiring. SOLUTION: Layout information such as the position and width of a power source is stored in an initial power source wiring information file 10. Connection relation information between the cells of a logical element or the like is stored in a logical file 20. A wiring system 30 reads the layout information such as the position and width of the power source from the file 10, reads the connection relation information between the cells of the logical element from the file 20 and executes processing for wiring by moving the power source wiring within the prescribed range, narrowing its width or dividing it when the wiring usage quantity in the prescribed area is larger than wiring capacity based on these pieces of the information.
申请公布号 JP2000011011(A) 申请公布日期 2000.01.14
申请号 JP19980172954 申请日期 1998.06.19
申请人 HITACHI LTD 发明人 KISHIMOTO TOSHIMICHI;SHIGEGAKI MASATO;SHIGA AKIO
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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