Cache coherency protocol for a data processing system including a multilevel memory hierarchy,申请号EP19990301067-传众专利搜索

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发明名称	Cache coherency protocol for a data processing system including a multilevel memory hierarchy
摘要
申请公布号	EP0936557(A3)	申请公布日期	2000.01.12
申请号	EP19990301067	申请日期	1999.02.15
申请人	INTERNATIONAL BUSINESS MACHINES	发明人	ARIMILLI, RAVI KUMAR;DODSON, JOHN STEVEN;LEWIS, JERRY DON
分类号	G06F12/08;(IPC1-7):G06F12/08	主分类号	G06F12/08
代理机构		代理人
主权项
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