| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a laminated chip varistor so as to improve easily the yield at low cost by constituting the chip varistor which can reduce leakage current after re-flow soldiering and has no malfunction caused by flowing of electrolytic plating to form terminal electrodes. SOLUTION: Terminal electrodes 2, and 3 are provided at both ends of a varistor element 1, while keeping the surface of the varistor element 1 with coarseness of the surface ranging from 0.01μm to 0.04μm. Before plating films 21, 31, 22, and 32 of the terminal electrodes 2, and 3 are formed, the varistor element 1 has to be put in a grinding vessel together with grinding materials so that the surface of the varistor element 1 can be ground to 0.01-0.04μm. After that, the plating films 21, 31, 22, and 32 are formed respectively.</p> |
