| 摘要 |
In a receiver, a reference frequency oscillator (RFO) generates a reference frequency signal having a reference frequency (Fref). A clock circuit derives a clock signal (CLK) from the reference frequency signal. A frequency converter (FRC) converts an input signal (RF) in frequency with a conversion frequency (Fconv) so as to obtain an intermediate frequency signal (IF). The conversion frequency (Fconv) is P times the reference frequency (Fref) divided by M, P and M being integers, P being adjustable. A frequency-shift circuit (FSC) is included for shifting the reference frequency (Fref) with a frequency shift ( DELTA Fref) which is substantially equal to K times the reference frequency (Fref) divided by a typical value of P (Ptyp) K being an integer ( DELTA Fref=K.Fref DIVIDED Ptyp). Accordingly, by shifting the reference frequency (Fref) with the aforementioned frequency shift ( DELTA Fref), it can be prevented that the clock signal (CLK) causes interference in a channel to which the receiver needs to be tuned, without substantially affecting tuning accuracy. There will always be a value of P for which the receiver is accurately tuned to the desired channel whether the reference frequency (Fref) is shifted or not. |
