发明名称 A MULTI-OUTPUT DIGITAL TO ANALOG CONVERTER
摘要 In a multiple-output digital to analog converter, digital input data (Dd) is converted into a plurality of analog output voltages (Voi) across associated loads (Li). A timing generator (TG) generates time periods (Til) in dependence on the digital input data (Dd). A buffer (B1) has an output (O1) to supply a waveform (Wf1) to the loads (Li) via a coupling circuit (Sli). The coupling circuit (Sli) couples a certain load (Li) to the buffer output (B1) during an associated time period (Til). The output voltage (Voi) across the certain load (Li) is related to a value of the waveform (Wfl) at the end of the associated time period (Til) when the coupling circuit decouples the load (Li) from the buffer output (O1). The multiple-output digital to analog converter further comprises a plurality of dummy loads (Ldi), each one of the dummy loads (Ldi) is associated to a corresponding one of the loads (Li). The dummy loads (Ldi) are coupled to the buffer output (O1) when the corresponding load (Ldi) is decoupled from the buffer output (O1). A pre-setting circuit (B2, S2i) generates the voltages (Vdi) across the dummy loads (Ldi) so as to be substantially equal to the output voltages (Voi) across the associated loads (Li) occurring when the coupling circuit (Sli) decouples the load (Li) from the output buffer (B1).
申请公布号 WO9953619(A3) 申请公布日期 2000.01.06
申请号 WO1999IB00576 申请日期 1999.04.01
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;PHILIPS AB 发明人 VOS, FRANCISCUS, P., M.
分类号 G09G3/36;G09G3/20;H03M1/66;H03M1/74;H03M1/82 主分类号 G09G3/36
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