| 摘要 |
A dynamic semiconductor memory comprising memory cells arranged in a matrix of row and columns, a half of the memory cells being formed into sub-array #1 and the remaining half into sub-array #2. One of a plurality of bit lines included in sub-array #1 and one of a plurality of bit lines included in sub-array #2 constitute a bit line pair. Each of a plurality of word lines corresponding to the columns is divided into a first word line belonging to sub-array #1 and a second word line belonging to sub-array #2. When one of word lines is selected, a potential is applied to one of the first or second word line. As a result, when the information charge of a memory cell is output to certain bit line pair, a reading operation does not take place for the bit lines adjacent thereto, with the latter maintained at a predetermined potential. Thus, the bit line pair is free from the influence of noise due to a potential variation of the adjacent bit lines and the influence of the potential within the bit line pair itself. |
