| 摘要 |
PURPOSE:To prevent the erroneous operation of an operator by detecting the condition of a partial deletion mode completion and returning automatically to a standard mode by doing this. CONSTITUTION:IC1-IC19 successively shift an S-IN signal, a latch signal is inputted by the number M of a clock, and then, the signal is latched as parallel data, transferred to a LED driver, and a LED78 is energized/non-energized for control. Thus, a CPU80, in a timing T3, energizes and controls the LED78 between 0-S1, P1-P2 and S2-M of an eraser 24. When a designated area is erased at a timing T2, the area is returned to a usual side erasing. At such a case, for example, a count register of the counter 0 of a P timer 94 is set to M, the count register of a counter 1 of the P timer 94 is set to 1, and the H output which continues until the count register is latched to an out 1 of the counter 1 of a P timer 94, appear. |
