| 摘要 |
A memory is used as a data buffer and switch between devices producing and consuming data in combination with a separate control channel which conveys flow control information between the devices connected through the memory. The control channel includes a signal sent from a sender to a receiver granting the receiver permission to read data from the memory. The receiver replies with a signal indicating that data has been read from the memory, permitting the sender to write data to the memory. The memory is considered a circular buffer by the sender. The sender writes data into the memory at sequential locations until the end of the circular buffer is reached. This end of the buffer may be represented by a limit pointer. When data is written to the memory, the sender indicates the amount of valid data in the memory in a signal to the receiver over the control channel. The receiver receives this signal and reads data from the memory up to and limited by the amount indicated by the sender. The amount of data read by the receiver from the memory is sent by the receiver in a reply to the sender through the separate control channel. The sender cannot overwrite the memory until the receiver indicates that the data has been read out of the memory. The reply received by the sender is used to advance a limit pointer which indicates the end of the circular buffer. This control channel reduces transfer latency incurred by managing memory coherency in applications with irregular rates of either sending or receiving data which may result from using controlled flow interconnect protocols. The control channel also may be used to communicate auxiliary information such as switching or other packet flow control information between connected devices. This auxiliary information may include the start address of a data buffer and memory, the buffer size and configuration, and an address of a destination device for the data. |
