Wave shaping circuit of semiconductor testing apparatus

摘要

A wave shaping circuit for a semiconductor device testing apparatus reduces discrepancies in timing of signals by shortening lengths of signal transmission paths. The scale of the circuit is restrained by reducing the number of connecting lines between a modulation waveform generator and buffer circuits. A set signal and a reset signal generated by the modulation waveform generator are input to a first wave shaping SR register which produces a single pattern waveform to be applied to devices under test. The single pattern waveform is multiplied n-fold by the buffer circuit. Signals from the buffer circuit are received by invert/noninvert circuits which provide invert signals and noninvert signals. Differential circuits receive the invert/noninvert signals to generate set signals and reset signals having minimal discrepancies in timing which are input to second wave shaping SR registers. The wave shaping SR registers thus produce n occurrences of pattern waveforms having the same pulse width for a plurality of devices under test.