| 摘要 |
A test connecting device including testkey and probe card for use in the testing of integrated circuits is provided. This test connecting device features the use of a symmetrical node-potential scheme that can offset the parasite capacitances between the probe pins on the probe card, thus allowing an increase in frequency response of the probe card. The probe card includes at least six probe pins arranged in a row; and correspondingly, the testkey includes at least six test pads for the six probe pins to make electrical contacts with them during the testing while the probe card is coupled to the testkey. This test connecting device can allow a high-frequency output signal to pass therethrough to the test instrument without causing attenuation to the signal. Moreover, the use of the test connecting device can eliminate the need to install additional hardware components, such as frequency dividers or additional stages to ring oscillators. The test connecting device is thus easy to implement, without having to take up further circuit areas in the integrated circuits.
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