发明名称 |
Process for fabricating semiconductor device having semiconductor layers epitaxially grown from active areas without short-circuit on field insulating layer |
摘要 |
A memory cell of a semiconductor dynamic random access memory device requires a bit line contact hole open to a drain region of a cell transistor for connecting a bit line to the drain region and a node contact hole open to a source region for connecting a storage electrode of a stacked capacitor to the source region, and the bit line contact hole and the node contact hole are plugged with silicon layers; the silicon layers are epitaxially grown from the source and drain regions over an oxide-encapsulated gate electrode of the cell transistor so as to increase the contact areas; and the silicon layers are firstly anisotropically grown until reaching the upper surface of the oxide-encapsulated gate electrode, and, thereafter, isotropically grown so as to increase the contact areas.
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申请公布号 |
US5946570(A) |
申请公布日期 |
1999.08.31 |
申请号 |
US19970974996 |
申请日期 |
1997.11.20 |
申请人 |
NEC CORPORATION |
发明人 |
KASAI, NAOKI;HADA, HIROMITSU;MORI, HIDEMITSU;TATSUMI, TORU |
分类号 |
H01L21/28;H01L21/285;H01L21/768;H01L21/822;H01L21/8242;H01L23/522;H01L27/04;H01L27/108;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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