发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device, with which power consumption can be reduced by a method wherein the control signal of a sub- amplifier circuit is easily matched to a column selection line signal, and the sub-amplifier circuit of a non-selective memory mat is stopped. SOLUTION: This semiconductor memory device is a DRAM of 64M but which uses a hierarchical input/output line configuration, and it is constituted of a main row decoder region, a main word driver region, a column decoder region, a circumferential circuit/bonding pad region, a memory cell array region, a sensing amplifier region, a sub-word driven region, and an intersection point region, etc. A sub-amplifier circuit 9 is arranged on the intersection point region 8 between a sensing amplifier region 6 and the sub-word driver region 7. A control signal DREADT of the sub-amplifier circuit 9 is inputted from the side of the column dweller region 3, in order to have the same pass between the control signal DREADT of the sub-amplifier circuit 9 and the signal of the column selective line YS, and a mat non-selective signal BLEQ is logically treated so that the non-selective sub-amplifier circuit 9 is not activated.
申请公布号 JPH11214652(A) 申请公布日期 1999.08.06
申请号 JP19980012209 申请日期 1998.01.26
申请人 HITACHI LTD 发明人 FUJISAWA HIROKI;YAHATA HIDEJI;NAKAMURA MASAYUKI
分类号 G11C11/407;G11C11/401;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/407
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