发明名称 MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To reduce the number of registers for controlling sector erasure of a memory device and reduce the number of steps for performing the sector erasure. SOLUTION: A relationship between each address terminal and an erasure sector is such that, for example, when a first address terminal S3001 is at 'H', a first erasure sector 1601 is erased in accordance with an erasure operation signal S4. For example, in the case where an erasure operation is performed for erasure sectors 1602-1605, an 'H' level is first input to address terminals S3002-$3005 which correspond to sectors to be erased in an address bus B20, thereby setting the erasure operation signal S4 to be active ('H'). Thus, a signal is output to erasure sector control signal buses B5 all of which were at a non-active condition ('L'), thereby performing the erasure operation for the erasure sectors 1602-1605.</p>
申请公布号 JPH11213679(A) 申请公布日期 1999.08.06
申请号 JP19980008815 申请日期 1998.01.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HATTORI NORIO;HORIKAWA NOBUKAZU
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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