| 摘要 |
A method and apparatus for right-shifting a signed or unsigned integer operand and rounding a fractional intermediate result towards or away from zero to obtain an integer result as prescribed by the MPEG standard in a single instruction cycle is disclosed. The apparatus includes a right-shifter for right-shifting the operand to obtain a fractional intermediate result that includes integer bits and fractional bits. The apparatus also includes a control circuit for generating an increment signal in response to a sign bit of the operand, the fractional bits, a mode signal indicative of whether the operand is signed or unsigned, and a round signal indicative of whether round towards zero or round away from zero is selected. The apparatus also includes an increment circuit for incrementing the integer bits and providing the incremented integer bits as the integer result when the increment signal has a first logical value, and for providing the integer bits as the integer result when the increment signal has a second logical value.
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