Integrated butt-contact process in shallow trench isolation

摘要

A new method of forming a butted contact in combination with a shallow trench isolation process is described. Shallow trench isolation areas are formed within the semiconductor substrate and filled with an oxide. A first photomask is formed having an opening larger than the butted contact to be formed and exposing a portion of at least one of the shallow trench isolation areas. The oxide is etched away within the shallow trench isolation area where it is exposed forming a misalignment trench wherein the exposed sidewall is adjacent to a P-well. A gate oxide layer is grown on the surface of the substrate and on the exposed sidewall of the misalignment trench. A first polysilicon layer is deposited overlying the gate oxide layer and filling the misalignment trench. The polysilicon and oxide layers are etched away to form gate electrodes and interconnection lines where a portion of the first polysilicon layer remains within the misalignment trench. A dielectric layer is deposited overlying the gate electrodes and lines. A second photomask is formed overlying the dielectric layer having an opening where the butted contact is to be made. The dielectric layer is etched away within the opening. A second layer of polysilicon is deposited within the opening to form a butted contact wherein the presence of the gate oxide layer within the misalignment trench prevents a short between the first and second polysilicon layers within the misalignment trench and the adjacent substrate.