Pilot-Transistor für quasi-vertikale DMOS-Anordnung
摘要
An isolated pilot transistor 100 for a QVDMOS device 10 has a gate and drain region in symmetry with the sources 20 of device 10 and an additional resistance 116 in the drain 118 to compensate for current spreading between the source 120 and the buried layer resistor 132. <IMAGE> <IMAGE>