Circuit for reproducing bit timing and method of reproducing bit timing

摘要

The circuit (14) detects a phase angle of a complex modulation signal on a complex plane, based on a real part digital signal and an imaginary part digital signal of the complex modulation signal, and then, transmits a first signal (Sa) indicative of the phase angle. The subtracter (15) makes subtraction between the first signal and a signal delayed by a symbol interval (Ts) from the first signal to thereby detect a phase difference on a complex plane among the modulation signals in the symbol interval (Ts). The circuit (17) detects a timing gap between a sampling clock and an optimal sampling point, based on the phase difference, to thereby transmit a second signal (Sb) indicative of the timing gap, in accordance with which, the first and second interpolation filters (18, 19) convert a real and imaginary part digital signals into signals associated with an optimal sampling point.