发明名称 |
Method of forming a shallow trench isolation region |
摘要 |
A method of making a shallow trench isolation region includes providing a silicon substrate. A pad oxide layer is formed over the silicon substrate. A silicon nitride layer is formed over the pad oxide layer. The silicon nitride layer and the pad oxide layer are patterned, and a trench is thus formed in the silicon substrate. A side-wall oxide layer is formed on a surface of the silicon substrate within the trench. A doped oxide layer is formed over the silicon nitride layer and within the trench. A portion of the doped oxide layer is removed to expose the silicon nitride layer. The silicon nitride layer is removed. The pad oxide layer is removed. A sacrificial oxide layer is formed over the silicon substrate. A well is formed in the silicon substrate. The sacrificial oxide layer is removed. A gate oxide layer is formed over the silicon substrate. A polysilicon layer is formed over the silicon substrate. The polysilicon layer is patterned to form a polysilicon gate.
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申请公布号 |
US5913132(A) |
申请公布日期 |
1999.06.15 |
申请号 |
US19970789531 |
申请日期 |
1997.01.27 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
TSAI, MENG-JIN |
分类号 |
H01L21/762;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/762 |
代理机构 |
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地址 |
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