发明名称 Memory device having pipelined access and method for pipelining data access
摘要 In one embodiment of the invention, a word line is coupled to a row of memory cells, and some of the memory cells are accessed before the firing signal has propagated all the way to the back end of the word line. In another embodiment of the invention, a circuit includes a memory row that has a plurality of memory cells, and a word line that is coupled to the memory cells. The word line has a front end and a back end, and is coupled to receive a row-activate signal that propagates from the front end to the back end. The circuit also includes an enable circuit that is operable to prohibit a data transfer to or from a memory cell approximately until the row-activate signal arrives at the memory cell, and is operable to prohibit a data transfer to or from another memory cell approximately until the row-activate signal arrives at the other memory cell.
申请公布号 US5901092(A) 申请公布日期 1999.05.04
申请号 US19970917036 申请日期 1997.08.22
申请人 MICRON TECHNOLOGY, INC. 发明人 TRAN, LUAN C.
分类号 G11C7/10;G11C8/00;(IPC1-7):G11C7/00 主分类号 G11C7/10
代理机构 代理人
主权项
地址