| 摘要 |
Then circuit includes an analog-to-digital converter (ADC); and one or more switched capacitor amplifier stages connected together in series with a first switched capacitor amplifier stage for receiving the analog input signal, and a last switched capacitor amplifier stage connected to the ADC. Moreover, each of the plurality of switched capacitor amplifier stages preferably has a selectable gain to permit control of an overall gain of the analog input signal upstream of the ADC. In addition, the first stage may also serve as a sample and hold circuit for the ADC. In one embodiment, the circuit may comprise an integrated circuit substrate on which the ADC and the plurality of switched capacitor amplifiers are formed so that the analog-to-digital converter is a monolithic integrated circuit. The circuit may also control the gain of each of the plurality of switched capacitor amplifier stages based upon a digital gain control word. A clock is preferably operatively connected to the ADC and the plurality of switched capacitor amplifier stages. Accordingly, gain control word changes cause relatively rapid changes in the overall gain.
|
