发明名称 |
ENCODER AND ENCODING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To make it possible to suppress the reduction of an SN ratio even when a deviated value exists in a block to be encoded. SOLUTION: An original signal cosisting of 4×4 blocks supplied through an input terminal 21 is supplied to a rearrangement circuit 22. The circuit 22 rearranges respective signal values in the descending order. A MAX' detection circuit 23 calculates a mean value of the prescribed number of signal values from MAX and sets up the calculated mean value as MAX'. A MIN' detection circuit 24 similarly calculates a mean value of the prescribed number of signal values from MIN and sets up the calculated mean value as MIN'. A subtractor 25 generates a dynamic range DR'. A subtractor 27 normalizes each signal value. A quatization circuit 28 quantizes each normalized signal value and generates requantized data Q. |
申请公布号 |
JPH1188877(A) |
申请公布日期 |
1999.03.30 |
申请号 |
JP19970242467 |
申请日期 |
1997.09.08 |
申请人 |
SONY CORP |
发明人 |
KONDO TETSUJIRO;TANAKA KENJI |
分类号 |
H04N19/124;H04N1/41;H04N7/24;H04N19/00;H04N19/126;H04N19/146;H04N19/176;H04N19/196 |
主分类号 |
H04N19/124 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|