发明名称 Control loops for low power, high speed PRML sampling data detection channel
摘要 A power-reduced digital control within a feedback control loop of a sampling data detection channel controls a predetermined operating parameter of the channel in which an analog to digital converter provides digital samples of information in the channel at a predetermined channel clock rate. The digital control comprises a parameter error extraction circuit clocked at the predetermined channel rate which is connected to receive digital samples from the analog to digital converter, and which extracts parameter error values from the digital samples; an averaging circuit for averaging the extracted parameter error values over an integral submultiple of the predetermined channel clock rate; and a parameter error processing circuit which is connected to the parameter error extraction circuit and clocked at the integral submultiple of the predetermined channel rate for generating and putting out digital control values within the feedback control loop for controlling the predetermined operating parameter. The parameter may be timing, gain or DC offset, and the sampling data detection channel may be a PRML channel of a magnetic hard disk drive. A power-reduced control method is also described.
申请公布号 US5886842(A) 申请公布日期 1999.03.23
申请号 US19970920696 申请日期 1997.08.29
申请人 QUANTUM CORPORATION 发明人 ZIPEROVICH, PABLO A.
分类号 G11B5/012;G11B5/09;G11B5/596;G11B20/10;G11B20/14;H04L7/033;H04L25/06;(IPC1-7):G11B5/09 主分类号 G11B5/012
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