发明名称 Method and apparatus for reducing power supply current surges in a charge pump using a delayed clock line
摘要 <p>The present invention is a charge pump circuit to reduce and distribute power supply current surges. The charge pump circuit includes a first clock line to provide a first clock thereon, a plurality of delay circuits connected in series, each delay circuit generating a delayed and inverted clock from its input clock on a respective output clock line, and a plurality of charge pump stages connected in series each to store charge thereon. The first clock line is coupled to the first charge pump stage and the plurality of output clock lines are coupled to a respective plurality of remaining charge pump stages. The operation of each charge pump stage is staggered to reduce and distribute the power supply current surges. &lt;IMAGE&gt;</p>
申请公布号 EP0902525(A2) 申请公布日期 1999.03.17
申请号 EP19980307090 申请日期 1998.09.03
申请人 INFORMATION STORAGE DEVICES, INC. 发明人 LEE, MAY;ENGH, LAWRENCE D.
分类号 H02M3/07;(IPC1-7):H02M3/07 主分类号 H02M3/07
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