| 摘要 |
A power-on reset circuit (28) is disclosed. The circuit includes a first stage circuit (30) and a second stage circuit (32). The first stage circuit includes an input terminal coupled to receive an input signal, a latch for detecting a power-on condition, and an output terminal for providing a first stage circuit output signal. The first stage circuit output signal remains in a first state after detection of the power-on condition. The second stage circuit includes an input terminal coupled to receive the first stage circuit output signal, a latch for detecting the power-on condition, and an output terminal for providing a second stage circuit output signal. The second stage circuit output signal remains in the first state after detection of the power-on condition. The first stage circuit output signal changes state from the first state to a second state when the input signal changes state from the second state to the first state, and the second stage circuit output signal changes state from the first state to the second state only the first time that the first stage circuit output signal changes state from the first state to the second state.
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