摘要 |
PROBLEM TO BE SOLVED: To quickly and surely restore the asynchronous data to a normal synchronous state by detecting the phase difference between a clock signal and a digital receiving signal, detecting the presence or absence of a frequency error between a reference signal and the clock signal, and giving a prescribed response time constant to the output of a comparison means selected by a selection means to feed it back to a variable frequency oscillator. SOLUTION: A 1st phase comparator 2 detects the phase difference between a clock signal (fo) and a digital receiving signal Ri, and a 2nd phase frequency comparator 3 detects the phase difference between the signal (fo) and the reference signals (fs) which are continuously generated with constant frequency. A frequency detection circuit 4 detects the frequency error between both signals (fo) and (fs). A selection circuit 5 selects the output of the comparator 2 or 3 based on the output Eo of the circuit 4. The comparator 2 is selected in a normal operation mode, and the comparator 3 is selected only when the circuit 4 detects a frequency error. |