| 摘要 |
PROBLEM TO BE SOLVED: To discriminate frequency at high speed by eliminating erroneous discrimination due to noise generation without increasing the number of cycles to be sampled. SOLUTION: An edge detection part 1 detects the change point of an input signal, and a counter 2 measures the interval of the change point from the change point of the input signal while using a reference clock as a count source and outputs it in every cycle. A 1st discrimination circuit part 3 discriminates whether the measured value of the counter 2 is settled within the allowable range of cycles or not and a 2nd discrimination circuit part 4 compares the measured value of the counter 2 with a predetermined value. Then, a latch 6 holds the discrimination value of the 2nd discrimination circuit part 4 and when the discrimination of the 1st discrimination circuit part 3 is out of the allowable range, the contents of the latch 6 are inhibited from being changed by a discriminate signal 5. The latch 6 holds the contents of the preceding input signal cycle, memories from 7-1 to 7-5 store the contents of the latch 6 for the five cycles of the latest input signal and a majority discrimination circuit 8 outputs data by performing the majority discrimination to contents in memories from 7-1 to 7-n. |
