Method for forming vias in multi-level integrated circuits, for use with multi-level metallizations

摘要

A process has been developed that allows reliable fabrication of vias, used for multi-level wiring purposes. The process features the use of a metallization structure, overlying a pillar structure in a specific area, resulting in a raised and extended metal surface, in areas of overlap. The raised and extended metal surface is used for subsequent via contact. Spin on glass processes are also employed to fill narrow spaces between metal structures.